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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-11-17 11:30:18 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-11-23 09:53:59 +0100
commit617ff9e657c4c4a6ffca325740e36d0d5e1f636e (patch)
tree7f88dd22233a76c5f26a11d47d72170e131e9c07 /arch/arm/mach-shmobile
parentcaf67a935740d7a4e9a7b0a3176237ad22a677e8 (diff)
ARM: shmobile: r8a7779: Use ioremap() to map SMP registers
Replace using the legacy IOMEM() macro to map the ARM Reset Vector Address Register (AVECR) by ioremap(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20201117103022.2136527-4-geert+renesas@glider.be
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 0ed73b650c14..f6713886ee16 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -20,8 +20,10 @@
#include "common.h"
#include "r8a7779.h"
-#define AVECR IOMEM(0xfe700040)
-#define R8A7779_SCU_BASE 0xf0000000
+#define HPBREG_BASE 0xfe700000
+#define AVECR 0x0040 /* ARM Reset Vector Address Register */
+
+#define R8A7779_SCU_BASE 0xf0000000
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
@@ -36,11 +38,15 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
{
+ void __iomem *base = ioremap(HPBREG_BASE, 0x1000);
+
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
- __raw_writel(__pa(shmobile_boot_vector), AVECR);
+ __raw_writel(__pa(shmobile_boot_vector), base + AVECR);
/* setup r8a7779 specific SCU bits */
shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus);
+
+ iounmap(base);
}
#ifdef CONFIG_HOTPLUG_CPU