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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-03-10 15:56:30 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-16 23:19:24 +0200
commit2d7945100b1ade1de73ddc397c17d0c40b278fb4 (patch)
tree78e581906b80f7aa2c449a30a762f05ba6662efd /arch/arm/mach-sunxi/sunxi.c
parent29d3d373e2a780b6e818f296ece6cc29742bc11f (diff)
ARM: sunxi: Add the Allwinner A31 compatible to the machine definition
The Allwinner A31 is a quad-Cortex-A7 based SoC, which shares a lot of IPs with the previous SoCs from Allwinner, like the PIO, I2C, UARTs, timers, watchdog IPs, but also differs by dropping the WEMAC ethernet controller and most notably dropping the in-house IRQ controller in favor of a ARM GIC one. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-sunxi/sunxi.c')
-rw-r--r--arch/arm/mach-sunxi/sunxi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 38a3c55527c8..11326d9f13da 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -96,6 +96,7 @@ static const char * const sunxi_board_dt_compat[] = {
"allwinner,sun4i-a10",
"allwinner,sun5i-a10s",
"allwinner,sun5i-a13",
+ "allwinner,sun6i-a31",
NULL,
};