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authorTuomas Tynkkynen <ttynkkynen@nvidia.com>2015-05-13 17:58:37 +0300
committerThierry Reding <treding@nvidia.com>2015-07-16 09:32:46 +0200
commitc4fe70ada40f53e8cd5e6f8d9a2433781e935835 (patch)
treef75f6382424809a9dfc3633e71991dd306e35e67 /arch/arm/mach-tegra/Kconfig
parentd8d7a08fa82ff7c241c74c2461f342c5685dda27 (diff)
clk: tegra: Add closed loop support for the DFLL
With closed loop support, the clock rate of the DFLL can be adjusted. The oscillator itself in the DFLL is a free-running oscillator whose rate is directly determined the supply voltage. However, the DFLL module contains logic to compare the DFLL output rate to a fixed reference clock (51 MHz) and make a decision to either lower or raise the DFLL supply voltage. The DFLL module can then autonomously change the supply voltage by communicating with an off-chip PMIC via either I2C or PWM signals. This driver currently supports only I2C. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/Kconfig')
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