diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2019-04-12 01:12:50 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-04-18 11:36:24 +0200 |
| commit | a359de1b4055b2e9c0e8d650b099fcb5ceca25fe (patch) | |
| tree | 363246f1f3716ca9f9d0c5bdcd946406feb7d50c /arch/arm/mach-tegra/iomap.h | |
| parent | 48791f972234301a72e4c40745d0abafa0985d2d (diff) | |
Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
Turned out that the actual bug was in the Memory Controller driver
that programmed shadowed registers without latching the new values
and then there was a bug on EMEM arbitration configuration calculation
that results in a wrong value being latched on resume from suspend.
The Memory Controller has been fixed properly now, hence the workaround
patch could be reverted safely.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/iomap.h')
| -rw-r--r-- | arch/arm/mach-tegra/iomap.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h index 9bc291e76887..9e5b2f869fc8 100644 --- a/arch/arm/mach-tegra/iomap.h +++ b/arch/arm/mach-tegra/iomap.h @@ -79,24 +79,15 @@ #define TEGRA_PMC_BASE 0x7000E400 #define TEGRA_PMC_SIZE SZ_256 -#define TEGRA_MC_BASE 0x7000F000 -#define TEGRA_MC_SIZE SZ_1K - #define TEGRA_EMC_BASE 0x7000F400 #define TEGRA_EMC_SIZE SZ_1K -#define TEGRA114_MC_BASE 0x70019000 -#define TEGRA114_MC_SIZE SZ_4K - #define TEGRA_EMC0_BASE 0x7001A000 #define TEGRA_EMC0_SIZE SZ_2K #define TEGRA_EMC1_BASE 0x7001A800 #define TEGRA_EMC1_SIZE SZ_2K -#define TEGRA124_MC_BASE 0x70019000 -#define TEGRA124_MC_SIZE SZ_4K - #define TEGRA124_EMC_BASE 0x7001B000 #define TEGRA124_EMC_SIZE SZ_2K |