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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 16:06:17 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 16:06:17 -0700
commit48d554418d3bfbba5e9dc1ebdf352f1b1f3ff4ee (patch)
tree696bdc0c1087e82c6493c852bca514bb0fcd7881 /arch/arm/mach-tegra/pcie.c
parentd61b7a572b292e2be409e13b4b3adf475f18fb29 (diff)
parent2cbe23e3a432e3d09a849adb197c8fcc09e7391d (diff)
Merge tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: timer cleanup work" from Arnd Bergmann: "These are split out from the generic soc and driver updates because there was a lot of conflicting work by multiple people. Marc Zyngier worked on simplifying the "localtimer" interfaces, and some of the platforms are touching the same code as they move to device tree based booting. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" * tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits) ARM: tegra: select USB_ULPI if USB is selected arm/tegra: pcie: fix return value of function ARM: ux500: fix compilation after local timer rework ARM: shmobile: remove additional __io() macro use ARM: local timers: make the runtime registration interface mandatory ARM: local timers: convert MSM to runtime registration interface ARM: local timers: convert exynos to runtime registration interface ARM: smp_twd: remove old local timer interface ARM: imx6q: convert to twd_local_timer_register() interface ARM: highbank: convert to twd_local_timer_register() interface ARM: ux500: convert to twd_local_timer_register() interface ARM: shmobile: convert to twd_local_timer_register() interface ARM: tegra: convert to twd_local_timer_register() interface ARM: plat-versatile: convert to twd_local_timer_register() interface ARM: OMAP4: convert to twd_local_timer_register() interface ARM: smp_twd: add device tree support ARM: smp_twd: add runtime registration support ARM: local timers: introduce a new registration interface ARM: smp_twd: make local_timer_stop a symbol instead of a #define ARM: mach-shmobile: default to no earlytimer ...
Diffstat (limited to 'arch/arm/mach-tegra/pcie.c')
-rw-r--r--arch/arm/mach-tegra/pcie.c16
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 14b29ab5d8f0..54a816ff3847 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void)
afi_writel(0, AFI_MSI_BAR_SZ);
}
-static void tegra_pcie_enable_controller(void)
+static int tegra_pcie_enable_controller(void)
{
u32 val, reg;
- int i;
+ int i, timeout;
/* Enable slot clock and pulse the reset signals */
for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) {
@@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void)
pads_writel(0xfa5cfa5c, 0xc8);
/* Wait for the PLL to lock */
+ timeout = 300;
do {
val = pads_readl(PADS_PLL_CTL);
+ usleep_range(1000, 1000);
+ if (--timeout == 0) {
+ pr_err("Tegra PCIe error: timeout waiting for PLL\n");
+ return -EBUSY;
+ }
} while (!(val & PADS_PLL_CTL_LOCKDET));
/* turn off IDDQ override */
@@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void)
/* Disable all execptions */
afi_writel(0, AFI_FPCI_ERROR_MASKS);
- return;
+ return 0;
}
static void tegra_pcie_xclk_clamp(bool clamp)
@@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
if (err)
return err;
- tegra_pcie_enable_controller();
+ err = tegra_pcie_enable_controller();
+ if (err)
+ return err;
/* setup the AFI address translations */
tegra_pcie_setup_translations();