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| author | James Morris <jmorris@namei.org> | 2010-05-06 10:56:07 +1000 |
|---|---|---|
| committer | James Morris <jmorris@namei.org> | 2010-05-06 10:56:07 +1000 |
| commit | 0ffbe2699cda6afbe08501098dff8a8c2fe6ae09 (patch) | |
| tree | 81b1a2305d16c873371b65c5a863c0268036cefe /arch/arm/mm/Kconfig | |
| parent | 4e5d6f7ec3833c0da9cf34fa5c53c6058c5908b6 (diff) | |
| parent | 7ebd467551ed6ae200d7835a84bbda0dcadaa511 (diff) | |
Merge branch 'master' into next
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c4ed9f93f646..5bd7c89a6045 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -736,6 +736,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG config OUTER_CACHE bool +config OUTER_CACHE_SYNC + bool + help + The outer cache has a outer_cache_fns.sync function pointer + that can be used to drain the write buffer of the outer cache. + config CACHE_FEROCEON_L2 bool "Enable the Feroceon L2 cache controller" depends on ARCH_KIRKWOOD || ARCH_MV78XX0 @@ -757,6 +763,7 @@ config CACHE_L2X0 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4 default y select OUTER_CACHE + select OUTER_CACHE_SYNC help This option enables the L2x0 PrimeCell. @@ -781,3 +788,9 @@ config ARM_L1_CACHE_SHIFT int default 6 if ARM_L1_CACHE_SHIFT_6 default 5 + +config ARCH_HAS_BARRIERS + bool + help + This option allows the use of custom mandatory barriers + included via the mach/barriers.h file. |