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authorMike Looijmans <mike.looijmans@topic.nl>2015-06-03 11:25:31 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-06-06 10:44:04 +0100
commit55af8a91640d362b20f2491336fce128c48f4079 (patch)
tree081cf55f317f15a2f228b127e3d0a093f8f8456d /arch/arm/mm/mmu.c
parente001bbae7147b111fe1aa42beaf835635f3c016e (diff)
ARM: 8387/1: arm/mm/dma-mapping.c: Add arm_coherent_dma_mmap
When dma-coherent transfers are enabled, the mmap call must not change the pg_prot flags in the vma struct. Split the arm_dma_mmap into a common and specific parts, and add a "arm_coherent_dma_mmap" implementation that does not alter the page protection flags. Tested on a topic-miami board (Zynq) using the ACP port to transfer data between FPGA and CPU using the Dyplo framework. Without this patch, byte-wise access to mmapped coherent DMA memory was about 20x slower because of the memory being marked as non-cacheable, and transfer speeds would not exceed 240MB/s. After this patch, the mapped memory is cacheable and the transfer speed is again 600MB/s (limited by the FPGA) when the data is in the L2 cache, while data integrity is being maintained. The patch has no effect on non-coherent DMA. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/mmu.c')
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