diff options
| author | Christoph Hellwig <hch@lst.de> | 2018-09-08 11:22:43 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2018-09-20 09:01:15 +0200 |
| commit | bc3ec75de5452db59b683487867ba562b950708a (patch) | |
| tree | ad93be8bbaea3429f83fb0afd6b7597ec90a1e7b /arch/arm/mm | |
| parent | f3ecc0ff0457eae93503792c6fc35921fa8a6204 (diff) | |
dma-mapping: merge direct and noncoherent ops
All the cache maintainance is already stubbed out when not enabled,
but merging the two allows us to nicely handle the case where
cache maintainance is required for some devices, but not others.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Paul Burton <paul.burton@mips.com> # MIPS parts
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/dma-mapping-nommu.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c index aa7aba302e76..0ad156f9985b 100644 --- a/arch/arm/mm/dma-mapping-nommu.c +++ b/arch/arm/mm/dma-mapping-nommu.c @@ -47,7 +47,8 @@ static void *arm_nommu_dma_alloc(struct device *dev, size_t size, */ if (attrs & DMA_ATTR_NON_CONSISTENT) - return dma_direct_alloc(dev, size, dma_handle, gfp, attrs); + return dma_direct_alloc_pages(dev, size, dma_handle, gfp, + attrs); ret = dma_alloc_from_global_coherent(size, dma_handle); @@ -70,7 +71,7 @@ static void arm_nommu_dma_free(struct device *dev, size_t size, unsigned long attrs) { if (attrs & DMA_ATTR_NON_CONSISTENT) { - dma_direct_free(dev, size, cpu_addr, dma_addr, attrs); + dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs); } else { int ret = dma_release_from_global_coherent(get_order(size), cpu_addr); |