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authorSamuel Holland <samuel@sholland.org>2021-01-03 04:00:07 -0600
committerMaxime Ripard <maxime@cerno.tech>2021-03-08 16:44:22 +0100
commit531fdbeedeb89bd32018a35c6e137765c9cc9e97 (patch)
tree500baed6f120f79ef944d9f4488e8864e16ac2cb /arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
parenta4bb294c61923eacacf55a2a5a9253ed7de68fa9 (diff)
arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection
On boards where the only peripheral connected to PL0/PL1 is an X-Powers PMIC, configure the connection to use the RSB bus rather than the I2C bus. Compared to the I2C controller that shares the pins, the RSB controller allows a higher bus frequency, and it is more CPU-efficient. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210103100007.32867-5-samuel@sholland.org
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 19339644a68a..c45d7b7fb39a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -175,12 +175,16 @@
vcc-pg-supply = <&reg_vcc_wifi_io>;
};
-&r_i2c {
+&r_ir {
+ status = "okay";
+};
+
+&r_rsb {
status = "okay";
- axp805: pmic@36 {
+ axp805: pmic@745 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x36>;
+ reg = <0x745>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -291,10 +295,6 @@
};
};
-&r_ir {
- status = "okay";
-};
-
&rtc {
clocks = <&ext_osc32k>;
};