diff options
| author | Icenowy Zheng <icenowy@aosc.io> | 2017-04-14 21:15:54 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-05-14 08:32:57 +0200 |
| commit | dc03a047df1dfaedbd68ed58206ea976c4f3c4ba (patch) | |
| tree | 8252c858bd2fb4d937dadf16f9df2d003b50ccf1 /arch/arm64/boot/dts/allwinner | |
| parent | 2ea659a9ef488125eb46da6eb571de5eae5c43f6 (diff) | |
arm64: allwinner: a64: add EHCI0/OHCI0 nodes to A64 DTSI
Allwinner A64 SoC features a pair of EHCI/OHCI controllers that can be
set to wire to USB0 port (the OTG-capable one), which can be used to
provide a better performance in host mode.
Add their device tree nodes.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index c7f669f5884f..65a344d9cea4 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -204,6 +204,28 @@ #phy-cells = <1>; }; + ehci0: usb@01c1a000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; |