diff options
author | Brad Larson <blarson@amd.com> | 2023-09-25 12:56:10 -0700 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2023-09-28 09:44:51 +0200 |
commit | 34dc1baba215b826e454b8d19e4f24adbeb7d00d (patch) | |
tree | f2957d1a2cf3cc2bcb63b47976223f0eb11c6bc7 /arch/arm64/boot/dts/amd/elba-asic-common.dtsi | |
parent | b0292fd8be37bb108ff3fd03d20484920d70d2a3 (diff) |
arm64: dts: Add AMD Pensando Elba SoC support
Add AMD Pensando common and Elba SoC specific device nodes
Signed-off-by: Brad Larson <blarson@amd.com>
Link: https://lore.kernel.org/r/20230925195610.47971-5-blarson@amd.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/amd/elba-asic-common.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amd/elba-asic-common.dtsi | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amd/elba-asic-common.dtsi b/arch/arm64/boot/dts/amd/elba-asic-common.dtsi new file mode 100644 index 000000000000..46b6c6783f58 --- /dev/null +++ b/arch/arm64/boot/dts/amd/elba-asic-common.dtsi @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +/* + * Copyright 2020-2022 Advanced Micro Devices, Inc. + */ + +&ahb_clk { + clock-frequency = <400000000>; +}; + +&emmc_clk { + clock-frequency = <200000000>; +}; + +&flash_clk { + clock-frequency = <400000000>; +}; + +&ref_clk { + clock-frequency = <156250000>; +}; + +&qspi { + status = "okay"; + + flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-rx-bus-width = <2>; + m25p,fast-read; + cdns,read-delay = <0>; + cdns,tshsl-ns = <0>; + cdns,tsd2d-ns = <0>; + cdns,tchsh-ns = <0>; + cdns,tslch-ns = <0>; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-hw-reset; + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&i2c0 { + clock-frequency = <100000>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf85263"; + reg = <0x51>; + }; +}; + +&spi0 { + #address-cells = <1>; + #size-cells = <0>; + num-cs = <4>; + cs-gpios = <0>, <0>, <&porta 1 GPIO_ACTIVE_LOW>, + <&porta 7 GPIO_ACTIVE_LOW>; + status = "okay"; +}; |