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authorHector Martin <marcan@marcan.st>2021-12-07 14:34:58 +0900
committerHector Martin <marcan@marcan.st>2021-12-07 23:43:35 +0900
commit111659c2a570ab1d62615040249dd37f39034d68 (patch)
tree5d99bdc4a395b0d042a8dfab5bca6461cf8c9a6e /arch/arm64/boot/dts/apple/t8103.dtsi
parentbf2c05b619ffc0bccf60d2108bfadc880ee7f5c7 (diff)
arm64: dts: apple: t8103: Remove PCIe max-link-speed properties
The driver doesn't support these, they shouldn't be in the SoC include anyway, and we're now configuring this in the bootloader instead. This also solves the j274 1G/10G Ethernet variant discrepancy, since that will now be configured properly based on the dynamic ADT property. Acked-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
Diffstat (limited to 'arch/arm64/boot/dts/apple/t8103.dtsi')
-rw-r--r--arch/arm64/boot/dts/apple/t8103.dtsi3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
index 15ee8c8c5fa0..8d1628e0b0c7 100644
--- a/arch/arm64/boot/dts/apple/t8103.dtsi
+++ b/arch/arm64/boot/dts/apple/t8103.dtsi
@@ -412,7 +412,6 @@
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 152 0>;
- max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -432,7 +431,6 @@
device_type = "pci";
reg = <0x800 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 153 0>;
- max-link-speed = <2>;
#address-cells = <3>;
#size-cells = <2>;
@@ -452,7 +450,6 @@
device_type = "pci";
reg = <0x1000 0x0 0x0 0x0 0x0>;
reset-gpios = <&pinctrl_ap 33 0>;
- max-link-speed = <1>;
#address-cells = <3>;
#size-cells = <2>;