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authorWilliam Zhang <william.zhang@broadcom.com>2022-08-03 10:54:51 -0700
committerFlorian Fainelli <f.fainelli@gmail.com>2022-08-15 09:51:54 -0700
commit72e0bdb6d7edb1785d58f2e8e7c80e1d2f93a319 (patch)
tree7506a9cfa4be72b8e193cbbf07b77d2a08b59938 /arch/arm64/boot/dts/broadcom
parentded8f22945899f4e87dd6d952bbc4abce6e64b7e (diff)
arm64: dts: Add BCM4908 generic board dts
Add generic bare bone bcm94908.dts file to support any 4908 based design. It supports cpu subsystem, memory and an uart console. This can be useful for board bring-up and cpu subsystem and memory related kernel test as well. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-6-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/broadcom')
-rw-r--r--arch/arm64/boot/dts/broadcom/bcmbca/Makefile1
-rw-r--r--arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts30
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d30fa75f0611..27741b71ba9e 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm4906-tplink-archer-c2300-v1.dtb \
bcm4908-asus-gt-ac5300.dtb \
bcm4908-netgear-raxe500.dtb \
+ bcm94908.dtb \
bcm4912-asus-gt-ax6000.dtb \
bcm94912.dtb \
bcm963158.dtb \
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
new file mode 100644
index 000000000000..fcbd3c430ace
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4908.dtsi"
+
+/ {
+ model = "Broadcom BCM94908 Reference Board";
+ compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};