diff options
author | Arnd Bergmann <arnd@arndb.de> | 2017-03-31 11:52:16 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2017-03-31 11:52:16 +0200 |
commit | bda484e76ed057d5c11653ae85f5f1866de86e06 (patch) | |
tree | f1d2fe3d46992202459bebe3864461ea2b92c460 /arch/arm64/boot/dts/broadcom | |
parent | 8e8c72535d9062df88b67ad448583b39efd559cd (diff) | |
parent | 231b362aec8c38a35bdbb2456c42b503ad6ce620 (diff) |
Merge tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM64-based SoCs Device Tree updates for
4.12, please pull the following:
- Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper
Device Tree nodes
- Jon replaces all occurences of: status = "ok" with status = "okay" to better
conform to the Device Tree specification
* tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: convert "ok" to "okay"
arm64: dts: NS2: Add Broadcom SPU driver DT entry
Diffstat (limited to 'arch/arm64/boot/dts/broadcom')
-rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2-svk.dts | 38 | ||||
-rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2-xmc.dts | 20 | ||||
-rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2.dtsi | 24 |
3 files changed, 53 insertions, 29 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts index 5ae08161649e..ec19fbf928a1 100644 --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts @@ -57,55 +57,55 @@ }; &enet { - status = "ok"; + status = "okay"; }; &pci_phy0 { - status = "ok"; + status = "okay"; }; &pci_phy1 { - status = "ok"; + status = "okay"; }; &pcie0 { - status = "ok"; + status = "okay"; }; &pcie4 { - status = "ok"; + status = "okay"; }; &pcie8 { - status = "ok"; + status = "okay"; }; &i2c0 { - status = "ok"; + status = "okay"; }; &i2c1 { - status = "ok"; + status = "okay"; }; &uart0 { - status = "ok"; + status = "okay"; }; &uart1 { - status = "ok"; + status = "okay"; }; &uart2 { - status = "ok"; + status = "okay"; }; &uart3 { - status = "ok"; + status = "okay"; }; &ssp0 { - status = "ok"; + status = "okay"; slic@0 { compatible = "silabs,si3226x"; @@ -126,7 +126,7 @@ }; &ssp1 { - status = "ok"; + status = "okay"; at25@0 { compatible = "atmel,at25"; @@ -150,23 +150,23 @@ }; &sata_phy0 { - status = "ok"; + status = "okay"; }; &sata_phy1 { - status = "ok"; + status = "okay"; }; &sata { - status = "ok"; + status = "okay"; }; &sdio0 { - status = "ok"; + status = "okay"; }; &sdio1 { - status = "ok"; + status = "okay"; }; &nand { diff --git a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts index 99a2723cccd2..ab4ae1a32fab 100644 --- a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts +++ b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts @@ -54,15 +54,15 @@ }; &enet { - status = "ok"; + status = "okay"; }; &i2c0 { - status = "ok"; + status = "okay"; }; &i2c1 { - status = "ok"; + status = "okay"; }; &mdio_mux_iproc { @@ -122,27 +122,27 @@ }; &pci_phy0 { - status = "ok"; + status = "okay"; }; &pcie0 { - status = "ok"; + status = "okay"; }; &pcie8 { - status = "ok"; + status = "okay"; }; &sata_phy0 { - status = "ok"; + status = "okay"; }; &sata_phy1 { - status = "ok"; + status = "okay"; }; &sata { - status = "ok"; + status = "okay"; }; &qspi { @@ -187,5 +187,5 @@ }; &uart3 { - status = "ok"; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 9f9e203c09c5..b8503fc1bb54 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -217,6 +217,12 @@ brcm,use-bcm-hdr; }; + crypto0: crypto@612d0000 { + compatible = "brcm,spum-crypto"; + reg = <0x612d0000 0x900>; + mboxes = <&pdc0 0>; + }; + pdc1: iproc-pdc1@612e0000 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x612e0000 0x445>; /* PDC FS1 regs */ @@ -226,6 +232,12 @@ brcm,use-bcm-hdr; }; + crypto1: crypto@612f0000 { + compatible = "brcm,spum-crypto"; + reg = <0x612f0000 0x900>; + mboxes = <&pdc1 0>; + }; + pdc2: iproc-pdc2@61300000 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x61300000 0x445>; /* PDC FS2 regs */ @@ -235,6 +247,12 @@ brcm,use-bcm-hdr; }; + crypto2: crypto@61310000 { + compatible = "brcm,spum-crypto"; + reg = <0x61310000 0x900>; + mboxes = <&pdc2 0>; + }; + pdc3: iproc-pdc3@61320000 { compatible = "brcm,iproc-pdc-mbox"; reg = <0x61320000 0x445>; /* PDC FS3 regs */ @@ -244,6 +262,12 @@ brcm,use-bcm-hdr; }; + crypto3: crypto@61330000 { + compatible = "brcm,spum-crypto"; + reg = <0x61330000 0x900>; + mboxes = <&pdc3 0>; + }; + dma0: dma@61360000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x61360000 0x1000>; |