diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2022-01-29 20:36:39 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2022-02-01 09:17:16 +0100 |
| commit | a0d5455330ece6f50ddf9e71d530f91c302803e9 (patch) | |
| tree | f5f9f8dde3b477497e433b4ba9e317f57bd0d528 /arch/arm64/boot/dts/exynos/exynos7.dtsi | |
| parent | ff72497f572844b8e5a787e27380576527f175af (diff) | |
arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7
Use the same order of USB 3.0 DRD controller clocks as in Exynos5433.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220129193646.372481-1-krzysztof.kozlowski@canonical.com
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos7.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7.dtsi | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 3364b09c3158..e38bb02a2152 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -684,11 +684,10 @@ reg = <0x15500000 0x100>; clocks = <&clock_fsys0 ACLK_USBDRD300>, <&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>, - <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>, <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>, + <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>, <&clock_fsys0 SCLK_USBDRD300_REFCLK>; - clock-names = "phy", "ref", "phy_pipe", - "phy_utmi", "itp"; + clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp"; samsung,pmu-syscon = <&pmu_system_controller>; #phy-cells = <1>; }; |