diff options
author | Kuldeep Singh <kuldeep.singh@nxp.com> | 2020-03-30 16:46:30 +0530 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2020-04-25 09:16:06 +0800 |
commit | f5ac5ac12dd678f0abe708baa55a5049a44b7ab8 (patch) | |
tree | d31df089baa9b6bf05cd209ac61c08d1d916fab8 /arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | |
parent | 593816fa2f357313a1ea584f95912d0761516583 (diff) |
arm64: dts: ls1012a: Add QSPI node properties
Add support for QSPI on NXP layerscape LS1012A-RDB, LS1012A-QDS,
LS1012A-FRDM and LS1012A-FRWY boards.
LS1012A-RDB has 2 Spansion "s25fs512s" flashes of size 64M each and only
one can be accessed at a time.
LS1012A-QDS/FRDM has 1 spansion "s25fs512s" flash of size 64M.
LS1012A-FRWY has one winbond "w25q16dw" flash of size 2M.
Use generic compatibles as "jedec,spi-nor" for automatic detection of
flash. Configure RX and TX buswidth values as 2 as only two I/O lines are
available for data transfer.
Add ls1012a(si) node alongwith flash nodes.
Signed-off-by: Ashish Kumar <Ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 337919366dc8..006e544d1fdb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -137,6 +137,19 @@ #size-cells = <2>; ranges; + qspi: spi@1550000 { + compatible = "fsl,ls1021a-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x1550000 0x0 0x10000>, + <0x0 0x40000000 0x0 0x10000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "qspi_en", "qspi"; + clocks = <&clockgen 4 0>, <&clockgen 4 0>; + status = "disabled"; + }; + esdhc0: esdhc@1560000 { compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; |