diff options
| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2020-02-23 22:47:11 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-03-11 15:58:13 +0800 |
| commit | 8023321d30be83cb9a9ef57376fa5a9c7c8bd887 (patch) | |
| tree | e3c9f9f71e6fa45dc936b4d962fae69f11b5ccef /arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | |
| parent | 80b06c5cae5487f590988fd296be36ecd97ede2a (diff) | |
arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE
This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.
Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.
The issue has no functional consequence so there is no real reason to
port the patch to stable trees.
Fixes: 927d7f857542 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 8694098aa94b..6e406a6a16cf 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -722,7 +722,6 @@ reg = <0x01 0xf0000000 0x0 0x100000>; #address-cells = <3>; #size-cells = <2>; - #interrupt-cells = <1>; msi-parent = <&its>; device_type = "pci"; bus-range = <0x0 0x0>; |