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authorIoana Ciornei <ioana.ciornei@nxp.com>2021-06-15 19:03:37 +0300
committerShawn Guo <shawnguo@kernel.org>2021-08-14 12:39:27 +0800
commit16fe55ba95323fe8de88b258e7f51f37b79d54b0 (patch)
treed2dd66d5464288c55fb9918b41b6d71b291e1055 /arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
parent915622ce17f96fdf08fd3170507bb006aadfc374 (diff)
arm64: dts: ls1088ardb: update PHY nodes with IRQ information
Describe the IRQs for both the QSGMII PHYs and the 10GBASE-R PHY found on the LS1088ARDB board. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index bf7b43ab1293..1bfbce69cc8b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -83,34 +83,42 @@
status = "okay";
mdio1_phy5: ethernet-phy@c {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0xc>;
};
mdio1_phy6: ethernet-phy@d {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0xd>;
};
mdio1_phy7: ethernet-phy@e {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0xe>;
};
mdio1_phy8: ethernet-phy@f {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0xf>;
};
mdio1_phy1: ethernet-phy@1c {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0x1c>;
};
mdio1_phy2: ethernet-phy@1d {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0x1d>;
};
mdio1_phy3: ethernet-phy@1e {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0x1e>;
};
mdio1_phy4: ethernet-phy@1f {
+ interrupts-extended = <&extirq 1 IRQ_TYPE_LEVEL_LOW>;
reg = <0x1f>;
};
};
@@ -120,6 +128,7 @@
mdio2_aquantia_phy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
reg = <0x0>;
};
};