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authorWasim Khan <wasim.khan@nxp.com>2020-09-13 10:51:16 +0530
committerShawn Guo <shawnguo@kernel.org>2020-09-22 17:06:04 +0800
commitf7d48ffcfc6efc6dc35ef34f4415b311a08d0840 (patch)
treeaacdb8cf7328f42adac35f53f3e845f6cf4287ec /arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
parent7358e05bddca16ec230596d218df62f998e310ae (diff)
arm64: dts: layerscape: Add label to pcie nodes
Add label to pcie nodes so that they are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index c909ad12cfec..28f44ac96ca7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Include file for NXP Layerscape-1088A family SoC.
*
- * Copyright 2017 NXP
+ * Copyright 2017-2020 NXP
*
* Harninder Rai <harninder.rai@nxp.com>
*
@@ -491,7 +491,7 @@
};
};
- pcie@3400000 {
+ pcie1: pcie@3400000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -517,7 +517,7 @@
status = "disabled";
};
- pcie@3500000 {
+ pcie2: pcie@3500000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */
@@ -543,7 +543,7 @@
status = "disabled";
};
- pcie@3600000 {
+ pcie3: pcie@3600000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */