summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
diff options
context:
space:
mode:
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-05-26 22:42:56 +0200
committerShawn Guo <shawnguo@kernel.org>2022-06-14 18:06:25 +0800
commit33597c6257bfe2a84f7950481118ef9783f42f49 (patch)
tree2909a17eac8d27a94575d3335a4e2a8d11bb6093 /arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
parent4a154e5ab9a2d7e8a0bf8ec3f031ce428ef79917 (diff)
arm64: dts: fsl: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 4ba1e0499dfd..3692d4cf6fcf 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -73,7 +73,7 @@
};
reboot {
- compatible ="syscon-reboot";
+ compatible = "syscon-reboot";
regmap = <&rstcr>;
offset = <0x0>;
mask = <0x2>;
@@ -479,28 +479,28 @@
sec_jr0: jr@10000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
- reg = <0x10000 0x10000>;
+ reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr@20000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
- reg = <0x20000 0x10000>;
+ reg = <0x20000 0x10000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr@30000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
- reg = <0x30000 0x10000>;
+ reg = <0x30000 0x10000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr3: jr@40000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
- reg = <0x40000 0x10000>;
+ reg = <0x40000 0x10000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
};
};