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authorFrieder Schrempf <frieder.schrempf@kontron.de>2021-09-30 17:56:30 +0200
committerShawn Guo <shawnguo@kernel.org>2021-10-05 15:24:06 +0800
commit315e7b884190a6c9c28e95ad3b724dde9e922b99 (patch)
treefd64889c89d9f32fa839b927d4189bb6ea85224a /arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
parentd2fefef92e2dcb5e1c18844ea51a14cbc1d5c6e9 (diff)
arm64: dts: imx8mm-kontron: Fix reset delays for ethernet PHY
According to the datasheet the VSC8531 PHY expects a reset pulse of 100 ns and a delay of 15 ms after the reset has been deasserted. Set the matching values in the devicetree. Reported-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
index d17abb515835..2f24f80afb2a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts
@@ -121,8 +121,8 @@
ethphy: ethernet-phy@0 {
reg = <0>;
- reset-assert-us = <100>;
- reset-deassert-us = <100>;
+ reset-assert-us = <1>;
+ reset-deassert-us = <15000>;
reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
};
};