summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
diff options
context:
space:
mode:
authorFabio Estevam <festevam@gmail.com>2021-07-16 10:28:44 -0300
committerShawn Guo <shawnguo@kernel.org>2021-09-22 10:47:55 +0800
commitbdd166bee8270534e42dc41793a43f3ec3b20dc9 (patch)
tree2d17c07c67be5216b4b9a168c21101e4229d179f /arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
parent6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f (diff)
arm64: dts: imx8mm-kontron-n801x-som: Fix the SPI chipselect polarity
The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd for example: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi')
0 files changed, 0 insertions, 0 deletions