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authorTim Harvey <tharvey@gateworks.com>2023-12-20 15:25:44 -0800
committerShawn Guo <shawnguo@kernel.org>2024-02-03 22:24:48 +0800
commitee6f057a7359da3dd1c4592bc90cb1e50cf75835 (patch)
treed0fa7ed855b67ccd108ea6ecfaf724756a38e1d8 /arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
parent6196fe777513b0dc65c831bcec3adc678cfce6f6 (diff)
arm64: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's
The GW7901 has GPIO's to configure the direction of its isolated digital I/O signals. Add the GPIO pinmux and line names. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
index 87b80e2412cb..169eb67c255c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
@@ -319,7 +319,7 @@
&gpio4 {
gpio-line-names = "", "", "", "",
- "", "", "uart3_rs232#", "uart3_rs422#",
+ "dig1_ctl", "dig2_ctl", "uart3_rs232#", "uart3_rs422#",
"uart3_rs485#", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "uart4_rs485#", "", "sim1det#", "sim2det#", "";
@@ -842,6 +842,8 @@
pinctrl_hog: hoggrp {
fsl,pins = <
+ MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x40000041 /* DIG1_CTL */
+ MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x40000041 /* DIG2_CTL */
MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* DIG2_OUT */
MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* DIG2_IN */
MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* DIG1_IN */