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authorLucas Stach <l.stach@pengutronix.de>2021-10-02 02:59:53 +0200
committerShawn Guo <shawnguo@kernel.org>2021-10-05 14:38:51 +0800
commit2604c5cafb9613921adf4817156728e51b5b6b77 (patch)
tree4cd74382a13592197f79b389e84a3d07e6d1bbd5 /arch/arm64/boot/dts/freescale/imx8mm.dtsi
parent4523be8e46beb8a0992f31f53218d3f9ec267816 (diff)
arm64: dts: imx8mm: add VPU blk-ctrl
Add the DT node for the VPU blk-ctrl. With this in place the VPU power domains are fully functional. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 6009e54266f0..f4a97bd8b7ad 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1170,6 +1170,19 @@
power-domains = <&pgc_gpu>;
};
+ vpu_blk_ctrl: blk-ctrl@38330000 {
+ compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
+ reg = <0x38330000 0x100>;
+ power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,
+ <&pgc_vpu_g2>, <&pgc_vpu_h1>;
+ power-domain-names = "bus", "g1", "g2", "h1";
+ clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>,
+ <&clk IMX8MM_CLK_VPU_G2_ROOT>,
+ <&clk IMX8MM_CLK_VPU_H1_ROOT>;
+ clock-names = "g1", "g2", "h1";
+ #power-domain-cells = <1>;
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */