diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-07-02 20:51:49 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-07-18 12:03:18 +0800 |
| commit | 7271f14d2f8b79834707581af265459058a758a9 (patch) | |
| tree | 11022ebe0c83cf9d6ba85f218d435cc3849b7fb3 /arch/arm64/boot/dts/freescale/imx8mm.dtsi | |
| parent | ca788bb10a6c6ecf96551fb1a23f243161a3b62c (diff) | |
arm64: dts: imx8mm: split PCIe ranges
Two entries are expected for PCIe ranges.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index d6b36f04f3dc..a831fd8e3706 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1345,8 +1345,8 @@ #size-cells = <2>; device_type = "pci"; bus-range = <0x00 0xff>; - ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ - 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */ + <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ num-lanes = <1>; num-viewport = <4>; interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; |