summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8mm.dtsi
diff options
context:
space:
mode:
authorMarkus Niebel <Markus.Niebel@ew.tq-group.com>2022-05-02 11:48:59 +0200
committerShawn Guo <shawnguo@kernel.org>2022-05-05 15:46:25 +0800
commit957aef026c462f27419082c61cd170f6e2d5c833 (patch)
treeb6adc66bff3368a6b580b7e0c47c4ef222f6310b /arch/arm64/boot/dts/freescale/imx8mm.dtsi
parent15ca3f00a1e3a56811371a63bf0c067603226eae (diff)
arm64: dt: imx8mm: support pwm polarity inversion
The i.MX8M Mini has the same PWM IP as i.MX6 / i.MX7. This IP and the driver supporting pwm polarity inversion. Switch CPU device tree fragment to use 3 pwm-cells and correct board device trees. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 1ee05677c2dd..1bf070473829 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -758,7 +758,7 @@
clocks = <&clk IMX8MM_CLK_PWM1_ROOT>,
<&clk IMX8MM_CLK_PWM1_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -769,7 +769,7 @@
clocks = <&clk IMX8MM_CLK_PWM2_ROOT>,
<&clk IMX8MM_CLK_PWM2_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -780,7 +780,7 @@
clocks = <&clk IMX8MM_CLK_PWM3_ROOT>,
<&clk IMX8MM_CLK_PWM3_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -791,7 +791,7 @@
clocks = <&clk IMX8MM_CLK_PWM4_ROOT>,
<&clk IMX8MM_CLK_PWM4_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};