diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2021-12-02 16:02:34 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-02-11 11:16:17 +0800 |
| commit | cfc5078432ca66dec56dadcaf8fb22d09f0c78dc (patch) | |
| tree | cf9a55472972d47998a14a764c989545c596fdb2 /arch/arm64/boot/dts/freescale/imx8mm.dtsi | |
| parent | e783362eb54cd99b2cac8b3a9aeac942e6f6ac07 (diff) | |
arm64: dts: imx8mm: Add the pcie phy support
Add the PCIe PHY support on iMX8MM platforms.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index f77f90ed416f..ef6a383a05d6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1211,6 +1211,19 @@ reg = <0x32e50200 0x200>; }; + pcie_phy: pcie-phy@32f00000 { + compatible = "fsl,imx8mm-pcie-phy"; + reg = <0x32f00000 0x10000>; + clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "ref"; + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + assigned-clock-rates = <100000000>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>; + resets = <&src IMX8MQ_RESET_PCIEPHY>; + reset-names = "pciephy"; + #phy-cells = <0>; + status = "disabled"; + }; }; dma_apbh: dma-controller@33000000 { |