diff options
| author | Adam Ford <aford173@gmail.com> | 2021-01-19 07:42:58 -0600 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-01-29 16:56:38 +0800 |
| commit | 738f7d40c155ccf0c5564f3d1dce02bea3b09eb1 (patch) | |
| tree | 8eb3cbfc361ac8959d67034f9b29fbd2030dcae1 /arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi | |
| parent | 189f65864f4eeb430bee0e6a18b7f871bf218878 (diff) | |
arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
There is a QSPI chip connected to the FlexSPI bus. Enable it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi index 2120e6485393..de2cd0e3201c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-beacon-som.dtsi @@ -7,6 +7,7 @@ aliases { rtc0 = &rtc; rtc1 = &snvs_rtc; + spi0 = &flexspi; }; usdhc1_pwrseq: usdhc1_pwrseq { @@ -89,6 +90,22 @@ }; }; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi>; + status = "okay"; + + flash@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -318,6 +335,17 @@ >; }; + pinctrl_flexspi: flexspigrp { + fsl,pins = < + MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 + MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + >; + }; + pinctrl_pmic: pmicirqgrp { fsl,pins = < MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141 |