diff options
| author | Marek Vasut <marex@denx.de> | 2023-05-27 12:22:33 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-05-27 21:02:08 +0800 |
| commit | 04a0b7b88402caf01fe5ebd0df28c3d956c61a50 (patch) | |
| tree | d7759e2440a52c0b76e4d5d8f5872633a53a4d33 /arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | |
| parent | 4d4ed48f9bda5ce9954b5af23548e68f166066ac (diff) | |
arm64: dts: imx8mp: Enable SAI audio on MX8MP DHCOM PDK2 and PDK3
Add SAI I2S and audio bindings on MX8MP DHCOM PDK2 and PDK3.
The VDDA is supplied from on-carrier-board regulator, the VDDIO
is supplied from always-on on-SoM regulator. Except for different
I2C bus used to connect the codec, the implementation is virtually
identical on both carrier boards.
Align regulator-avdd name to regulator-3p3vdd on PDK3, since this
is the VDDA supply and it is the same on both carrier boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi index 599c4334f32b..cb1953d14aa9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi @@ -49,6 +49,14 @@ startup-delay-us = <100>; vin-supply = <&buck4>; }; + + reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */ + compatible = "regulator-fixed"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "VDD_3P3V_AWO"; + }; }; &A53_0 { @@ -918,6 +926,15 @@ >; }; + pinctrl_sai3: dhcom-sai3-grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6 + MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6 + MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6 + MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6 + >; + }; + pinctrl_touch: dhcom-touch-grp { fsl,pins = < /* #TOUCH_INT */ |