diff options
| author | Christian Hemp <c.hemp@phytec.de> | 2023-07-19 09:13:07 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-07-19 15:52:32 +0800 |
| commit | 312ab094197d02c8a3d2d28671efb6510ff1a09e (patch) | |
| tree | c93f9517b0346e175ea20021f49379201530d95d /arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | |
| parent | c982ecfa7992a7c2c9eb327b05b69e07bad3ab30 (diff) | |
arm64: dts: imx8mp-phycore-som: Remove eth phy interrupt
In some occasions the ethernet phy IRQ can not be detected correctly
by the SoC. This leads to a non detected link in Linux. The problem is
caused by the buffer that adjusts the voltage between ethernet phy
and SoC. To workaround this, remove the IRQ support for the ethernet
phy and use polling instead.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index ecc4bce6db97..e73f1711ec89 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -54,8 +54,6 @@ ethphy1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; @@ -222,7 +220,6 @@ MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 - MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x11 >; }; |