diff options
| author | Marek Vasut <marex@denx.de> | 2022-12-02 17:23:51 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-12-31 20:34:52 +0800 |
| commit | 5b81a87ddd56ebdcdc7bf5430bc33872168c36f4 (patch) | |
| tree | 84fe73cb7f4a6b3474db7d929844dda3a19caada /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | ee0d68f219be8618f53d3f8808952e20525e3f30 (diff) | |
arm64: dts: imx8m: Document the fuse address calculation
The mapping from OCOTP reg DT property to Fusemap Descriptions Table in
the datasheet is often unclear. Add a comment to make it easier to find
out how it works. No functional change.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 7cddfa7a0d56..58b466633f22 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -425,19 +425,32 @@ #address-cells = <1>; #size-cells = <1>; - imx8mp_uid: unique-id@8 { + /* + * The register address below maps to the MX8M + * Fusemap Description Table entries this way. + * Assuming + * reg = <ADDR SIZE>; + * then + * Fuse Address = (ADDR * 4) + 0x400 + * Note that if SIZE is greater than 4, then + * each subsequent fuse is located at offset + * +0x10 in Fusemap Description Table (e.g. + * reg = <0x8 0x8> describes fuses 0x420 and + * 0x430). + */ + imx8mp_uid: unique-id@8 { /* 0x420-0x430 */ reg = <0x8 0x8>; }; - cpu_speed_grade: speed-grade@10 { + cpu_speed_grade: speed-grade@10 { /* 0x440 */ reg = <0x10 4>; }; - eth_mac1: mac-address@90 { + eth_mac1: mac-address@90 { /* 0x640 */ reg = <0x90 6>; }; - eth_mac2: mac-address@96 { + eth_mac2: mac-address@96 { /* 0x658 */ reg = <0x96 6>; }; }; |