diff options
| author | Sherry Sun <sherry.sun@nxp.com> | 2022-03-21 15:51:31 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-04-11 09:39:12 +0800 |
| commit | 68b7cf5d91d4c7e8a690693a53738e66d60113f1 (patch) | |
| tree | b79475d7b61f1c379a815b6cee5b874d5379a9db /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 21a14c68f3a34e1ad06d05c153446644fefa748b (diff) | |
arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index e910dc22bf43..2c207bc27d70 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1009,6 +1009,12 @@ interrupt-parent = <&gic>; }; + edacmc: memory-controller@3d400000 { + compatible = "snps,ddrc-3.80a"; + reg = <0x3d400000 0x400000>; + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; + }; + ddr-pmu@3d800000 { compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu"; reg = <0x3d800000 0x400000>; |