diff options
| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2022-04-06 17:34:00 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-05-05 09:32:55 +0800 |
| commit | 9d89189d5227507a05a6029818e1a2e2b074522a (patch) | |
| tree | c0b584fbcc715fb5a68f06a9111312c3e8ebad7a /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 2ae42e0c0b67d155cdac1f801f59ac3290650442 (diff) | |
arm64: dts: imx8mp: Add MEDIAMIX power domains
Add the power domains related to the MEDIAMIX to the GPC.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 3a59ce27e312..a0b4957f7a16 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -523,6 +523,11 @@ #address-cells = <1>; #size-cells = <0>; + pgc_mipi_phy1: power-domain@0 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY1>; + }; + pgc_pcie_phy: power-domain@1 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_PCIE_PHY>; @@ -565,6 +570,18 @@ power-domains = <&pgc_gpumix>; }; + pgc_mediamix: power-domain@10 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX>; + clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + }; + + pgc_mipi_phy2: power-domain@16 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_MIPI_PHY2>; + }; + pgc_hsiomix: power-domains@17 { #power-domain-cells = <0>; reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>; @@ -574,6 +591,12 @@ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>; assigned-clock-rates = <500000000>; }; + + pgc_ispdwp: power-domain@18 { + #power-domain-cells = <0>; + reg = <IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP>; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_DIV>; + }; }; }; }; |