diff options
| author | Daniel Baluta <daniel.baluta@nxp.com> | 2021-07-23 14:05:40 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-08-14 12:39:27 +0800 |
| commit | bc3ab388ee84812c2f217965b92fd5e1a4a712f2 (patch) | |
| tree | 31a96d481b49604108d7ae002c4301a74587265e /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | 78e80c4b4238c1f5642b975859664fced4f9c69e (diff) | |
arm64: dts: imx8mp: Add dsp node
i.MX8 MPlus SoC integrates Cadence HIFI4 DSP. This core runs either a
custom firmware or the open source SOF firmware [1]
DSP device is handled by SOF OF driver found in
sound/soc/sof/sof-of-dev.c
Notice that the DSP node makes use of:
- dsp_reserved, a reserved memory region for various Audio
resources (e.g firmware loading, audio buffers, etc).
- Messaging Unit (mu2) for passing notifications betweem ARM
core and DSP.
[1] https://thesofproject.github.io/latest/platforms/index.html
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 9f7c7f587d38..2a1a4ff36c67 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -135,6 +135,17 @@ clock-output-names = "clk_ext4"; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dsp_reserved: dsp@92400000 { + reg = <0 0x92400000 0 0x2000000>; + no-map; + }; + }; + pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_PPI 7 @@ -698,6 +709,14 @@ #mbox-cells = <2>; }; + mu2: mailbox@30e60000 { + compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu"; + reg = <0x30e60000 0x10000>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <2>; + status = "disabled"; + }; + i2c5: i2c@30ad0000 { compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c"; #address-cells = <1>; @@ -938,5 +957,16 @@ snps,dis-u2-freeclk-exists-quirk; }; }; + + dsp: dsp@3b6e8000 { + compatible = "fsl,imx8mp-dsp"; + reg = <0x3b6e8000 0x88000>; + mbox-names = "txdb0", "txdb1", + "rxdb0", "rxdb1"; + mboxes = <&mu2 2 0>, <&mu2 2 1>, + <&mu2 3 0>, <&mu2 3 1>; + memory-region = <&dsp_reserved>; + status = "disabled"; + }; }; }; |