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authorMarek Vasut <marex@denx.de>2023-02-27 16:54:23 +0100
committerShawn Guo <shawnguo@kernel.org>2023-03-14 11:13:07 +0800
commite7567840ecd323425e7bd1e97f1945bf811fecdc (patch)
treeb4d795aa484cb65da4610aa64bd8b0acf52bb321 /arch/arm64/boot/dts/freescale/imx8mp.dtsi
parent5a51e1f2b083423f75145c512ee284862ab33854 (diff)
arm64: dts: imx8mp: Reorder clock and reg properties
Align the clock and reg properties order with example bindings and the rest of the imx8mp.dtsi . No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index d4886141bd9d..1b6757148516 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1202,10 +1202,10 @@
lvds_bridge: bridge@5c {
compatible = "fsl,imx8mp-ldb";
- clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
- clock-names = "ldb";
reg = <0x5c 0x4>, <0x128 0x4>;
reg-names = "ldb", "lvds";
+ clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
+ clock-names = "ldb";
assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
status = "disabled";