arm64: dts: imx8mp: move PCIe controller clock config to SoC dtsi

The only difference in PCIe clock configuration between boards is how
the PCIe reference clock is generated. The refclock configuration is
fully contained in the PCIe PHY node, so the PCIe controller clocks
can be set up in the SoC dtsi, as there is no reason for any board to
use a different configuration.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index dd2df83f6f27..a73509926e07 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1202,6 +1202,13 @@
 			compatible = "fsl,imx8mp-pcie";
 			reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
 			reg-names = "dbi", "config";
+			clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+				 <&clk IMX8MP_CLK_PCIE_ROOT>,
+				 <&clk IMX8MP_CLK_HSIO_AXI>;
+			clock-names = "pcie", "pcie_aux", "pcie_bus";
+			assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
+			assigned-clock-rates = <10000000>;
+			assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";