diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-11-02 10:11:17 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-11-30 22:30:29 +0800 |
| commit | 08a1a2e205e3a5159a9dcc2c0019e6f9c1e04f90 (patch) | |
| tree | fc1656d09286c97ceb9f8e0b4f02f52660eab454 /arch/arm64/boot/dts/freescale/imx8mq-evk.dts | |
| parent | 71fa01d3a909446ca70c3b751f5a1124b2552329 (diff) | |
arm64: dts: imx8mq-evk: Add spdif sound card support
There are two spdif IP on imx8mq, spdif1 is for normal
spdif device, spdif2 is for HDMI ARC interface.
Enable these spdif sound card in this patch.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index 2418cca00bc5..e4250812586b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -87,6 +87,21 @@ clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; }; }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif1>; + spdif-out; + spdif-in; + }; + + sound-hdmi-arc { + compatible = "fsl,imx-audio-spdif"; + model = "imx-hdmi-arc"; + spdif-controller = <&spdif2>; + spdif-in; + }; }; &A53_0 { @@ -336,6 +351,22 @@ status = "okay"; }; +&spdif1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif1>; + assigned-clocks = <&clk IMX8MQ_CLK_SPDIF1>; + assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + status = "okay"; +}; + +&spdif2 { + assigned-clocks = <&clk IMX8MQ_CLK_SPDIF2>; + assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -467,6 +498,13 @@ >; }; + pinctrl_spdif1: spdif1grp { + fsl,pins = < + MX8MQ_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6 + MX8MQ_IOMUXC_SPDIF_RX_SPDIF1_IN 0xd6 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 |