diff options
| author | Martin Kepplinger <martin.kepplinger@puri.sm> | 2020-12-22 16:13:47 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-01-11 09:20:13 +0800 |
| commit | 1773b8d6697ac8e9380843fe5c13c25e95baa702 (patch) | |
| tree | 6f1b69b671a652becc1cb61408dd3b00c6bafe13 /arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts | |
| parent | 6a67d8fbee56c2e99cf71bddbd55ab1e39dd682a (diff) | |
arm64: dts: imx8mq-librem5-r3: workaround i2c1 issue with 1GHz cpu voltage
This is a workaround for a hardware bug in the r3 revision that basically would
stop the system due to traffic on the i2c1 bus. A cpu voltage change would
trigger such traffic and that's what is avoided in order to work around it.
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts index 6704ea2c72a3..0d38327043f8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts @@ -10,6 +10,12 @@ compatible = "purism,librem5r3", "purism,librem5", "fsl,imx8mq"; }; +&a53_opp_table { + opp-1000000000 { + opp-microvolt = <1000000>; + }; +}; + &accel_gyro { mount-matrix = "1", "0", "0", "0", "1", "0", |