diff options
| author | Peng Fan <peng.fan@nxp.com> | 2023-03-28 11:36:37 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-04-06 09:42:33 +0800 |
| commit | 72783d652005d6732903c35a323170d57f5dab8f (patch) | |
| tree | c5dff99eda5fe6f25a8f8bb19e3451ed807c976d /arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | |
| parent | 523306b6608c49a39aff772039e96510f2ebc0bf (diff) | |
arm64: dts: imx8mq-librem5: update pinctrl to match dtschema
The dtschema requires 'grp' in the end, so update the name.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi index ceced6bc4e89..48d96183f3d1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -686,7 +686,7 @@ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd @@ -703,7 +703,7 @@ >; }; - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf @@ -733,7 +733,7 @@ >; }; - pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d @@ -746,7 +746,7 @@ >; }; - pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f |