diff options
| author | Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-28 18:47:48 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-09-05 14:29:17 +0800 |
| commit | 32e67c15b6db796938be47145d6052d3ccceb4e3 (patch) | |
| tree | db5a2eec20c1621bca7f4a837260b11fdf9ddce8 /arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi | |
| parent | 02485f4aa1bd9e85756d17a1b6ba6fcae9de345c (diff) | |
arm64: dts: imx8mq-sr-som: Align pin configuration group names with schema
Device tree schema expects pin configuration groups to end with 'grp'
suffix, otherwise dtbs_check complain with a warning like:
... do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi index 404c46671b96..0187890a90c5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-sr-som.dtsi @@ -275,7 +275,7 @@ >; }; - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd @@ -292,7 +292,7 @@ >; }; - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf |