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authorFrank Li <Frank.Li@nxp.com>2023-09-25 16:49:13 -0400
committerShawn Guo <shawnguo@kernel.org>2023-10-10 10:52:49 +0800
commit5f0a55f6f2e34b2db03b387eae8ff03da72b755b (patch)
treeb13796158b49957cce95332d21698ff790e03b5c /arch/arm64/boot/dts/freescale/imx8qm-mek.dts
parentf4f9f6bf433828a1fe4b8365922916d505fdb61d (diff)
arm64: dts: imx8qm-mek: enable 8qm lpuart2 and lpuart3
Enable uart2 and uart3 for imx8qm-mek board. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qm-mek.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-mek.dts26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 0b34cc2250e1..6d50838ad17d 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -47,6 +47,18 @@
status = "okay";
};
+&lpuart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart2>;
+ status = "okay";
+};
+
+&lpuart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart3>;
+ status = "okay";
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -118,6 +130,20 @@
>;
};
+ pinctrl_lpuart2: lpuart2grp {
+ fsl,pins = <
+ IMX8QM_UART0_RTS_B_DMA_UART2_RX 0x06000020
+ IMX8QM_UART0_CTS_B_DMA_UART2_TX 0x06000020
+ >;
+ };
+
+ pinctrl_lpuart3: lpuart3grp {
+ fsl,pins = <
+ IMX8QM_M41_GPIO0_00_DMA_UART3_RX 0x06000020
+ IMX8QM_M41_GPIO0_01_DMA_UART3_TX 0x06000020
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041