diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2022-09-22 18:29:22 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-10-23 21:10:49 +0800 |
| commit | 8fb7256af86fcdebcefcff39b3043aa1619229a7 (patch) | |
| tree | 097d758f15173d39e846d91df92a189a47a13315 /arch/arm64/boot/dts/freescale | |
| parent | 909c3951afa69f4b820ad0b7f975900f8c3d6122 (diff) | |
arm64: dts: verdin-imx8mm: improve pcie node
Slight improvement of pcie node to be more in-line with what we add on
the Verdin iMX8M Plus.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi index 484d58d303f3..7bc51249a502 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi @@ -653,7 +653,8 @@ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_250M>; assigned-clock-rates = <10000000>, <250000000>; - clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>, + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, + <&clk IMX8MM_CLK_PCIE1_AUX>, <&clk IMX8MM_CLK_PCIE1_PHY>; clock-names = "pcie", "pcie_aux", "pcie_bus"; pinctrl-names = "default"; @@ -664,6 +665,7 @@ &pcie_phy { clocks = <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "ref"; fsl,clkreq-unsupported; fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>; fsl,tx-deemph-gen1 = <0x2d>; |