diff options
| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-04-22 00:32:14 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-05-16 18:29:06 +0200 |
| commit | a0936e9edf16750867b65c8f2017352f1ea3dea8 (patch) | |
| tree | 9a58581d99d0cc1be1481b0cce721170a08542d2 /arch/arm64/boot/dts/hisilicon/hi6220.dtsi | |
| parent | 9f921604a91c637eb57e57668045ca5c21f49f05 (diff) | |
arm64: dts: hisilicon: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:
hi3660-hikey960.dtb: l2-cache0: 'cache-unified' is a required property
Link: https://lore.kernel.org/r/20230421223215.115666-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi6220.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index f6d3202b0d1a..872e9c73c422 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -187,11 +187,13 @@ CLUSTER0_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; CLUSTER1_L2: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; |