diff options
| author | Richard Gong <richard.gong@intel.com> | 2019-10-17 14:34:40 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2019-10-21 22:49:09 -0500 |
| commit | aa74337ee73df5de3cb6c920100d01c3d95346cc (patch) | |
| tree | a76cacef1b26378a566810e43245414f9496b9f4 /arch/arm64/boot/dts/intel | |
| parent | 05c9c5a99d6111f4842eacdbcad86285ebe05ced (diff) | |
arm64: dts: agilex: add service layer, fpga manager and fpga region
Add service layer, fpga manager and fpga region to the device tree
on Intel Agilex platform.
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/intel')
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 36abc25320a8..94090c6fb946 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -12,6 +12,19 @@ #address-cells = <2>; #size-cells = <2>; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + service_reserved: svcbuffer@0 { + compatible = "shared-dma-pool"; + reg = <0x0 0x0 0x0 0x1000000>; + alignment = <0x1000>; + no-map; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -81,6 +94,13 @@ interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; + base_fpga_region { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr>; + }; + gmac0: ethernet@ff800000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff800000 0x2000>; @@ -442,5 +462,17 @@ status = "disabled"; }; + + firmware { + svc { + compatible = "intel,stratix10-svc"; + method = "smc"; + memory-region = <&service_reserved>; + + fpga_mgr: fpga-mgr { + compatible = "intel,stratix10-soc-fpga-mgr"; + }; + }; + }; }; }; |