diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2020-06-30 13:44:37 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2020-07-18 20:12:07 -0500 |
| commit | d4ae4dd346cd49302d157b129ead2f60d3a82534 (patch) | |
| tree | 7b26f4c0f7bb9aaa8e8ad9ef872a20e3546552f4 /arch/arm64/boot/dts/intel | |
| parent | 48f36de93a504e63e3b0dadd5b9ea666663e5662 (diff) | |
arm64: dts: agilex: add nand clocks
Add the clock properties for the NAND dts node.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/intel')
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index e300330536b7..ac1b2422e8d4 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -309,6 +309,10 @@ <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 97 4>; + clocks = <&clkmgr AGILEX_NAND_CLK>, + <&clkmgr AGILEX_NAND_X_CLK>, + <&clkmgr AGILEX_NAND_ECC_CLK>; + clock-names = "nand", "nand_x", "ecc"; resets = <&rst NAND_RESET>, <&rst NAND_OCP_RESET>; status = "disabled"; }; |