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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-07-31 14:21:23 +0200
committerGregory CLEMENT <gregory.clement@bootlin.com>2019-08-27 16:17:28 +0200
commitd04abe999e20a57c96b305d329e480ffe057c9ec (patch)
tree35aa9000d6947ef71bd98f524ff2f6c1266d8cb3 /arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
parent93ab25e6f5da60c7678bf54746836f83e7729284 (diff)
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k based boards. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi19
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
index 205071b45a32..b8f28d62be5c 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
@@ -239,8 +239,13 @@
};
&cp0_sata0 {
- /* CPM Lane 0 - U29 */
status = "okay";
+
+ /* CPM Lane 5 - U29 */
+ sata-port@1 {
+ phys = <&cp0_comphy5 1>;
+ phy-names = "cp0-sata0-1-phy";
+ };
};
&cp0_sdhci0 {
@@ -324,9 +329,19 @@
};
&cp1_sata0 {
+ status = "okay";
+
/* CPS Lane 1 - U32 */
+ sata-port@0 {
+ phys = <&cp1_comphy1 0>;
+ phy-names = "cp1-sata0-0-phy";
+ };
+
/* CPS Lane 3 - U31 */
- status = "okay";
+ sata-port@1 {
+ phys = <&cp1_comphy3 1>;
+ phy-names = "cp1-sata0-1-phy";
+ };
};
&cp1_spi1 {