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authorRobert Marko <robert.marko@sartura.hr>2023-09-14 11:45:01 +0200
committerGregory CLEMENT <gregory.clement@bootlin.com>2023-09-20 11:57:00 +0200
commit660b8b2f394470fae2774daf7473ddc259373a5a (patch)
treeb3bb8c4324240a81b136e16e2dabb0a737e3938c /arch/arm64/boot/dts/marvell
parentfe8087770179c104d9edf5f191cd0de1dd3be93d (diff)
arm64: dts: marvell: eDPU: add support for version with external switch
New revision of eDPU uses an Marvell MV88E6361 switch to connect the SFP cage and G.hn IC instead of connecting them directly to the ethernet controllers. U-Boot will enable the switch node and disable the unused ethernet controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts47
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
index 57fc698e55d0..d6d37a1f6f38 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
&eth0 {
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+&mdio {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&smi_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <&eth0>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <&sfp_eth1>;
+ };
+ };
+ };
+};