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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-04-07 16:32:23 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2022-04-26 12:38:17 +0200
commit402eb8ec54b36f8fc0649768c01abb57062d6f8b (patch)
tree3657f76f97aafd1d809ba5afbc7867ec75e1be93 /arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
parent65b96377bf9130617ced41f317f3ec387d3e0dc3 (diff)
arm64: dts: microchip: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220407143223.295344-2-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/microchip/sparx5_pcb125.dts')
-rw-r--r--arch/arm64/boot/dts/microchip/sparx5_pcb125.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
index 9baa085d7861..dbf8c1d48a02 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
@@ -47,7 +47,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* CS0 */
- spi-flash@9 {
+ flash@9 {
compatible = "jedec,spi-nor";
spi-max-frequency = <8000000>;
reg = <0x9>; /* SPI */
@@ -59,7 +59,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <1>; /* CS1 */
- spi-flash@9 {
+ flash@9 {
compatible = "spi-nand";
pinctrl-0 = <&cs1_pins>;
pinctrl-names = "default";