diff options
| author | Mikko Perttunen <mperttunen@nvidia.com> | 2018-07-02 15:11:31 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-07-02 15:57:39 +0200 |
| commit | 7780a03495e13cd2bef704bcbf8c727de9f65232 (patch) | |
| tree | 923375bcae19c856bed65cb11339720cdad1d5ec /arch/arm64/boot/dts/nvidia/tegra194.dtsi | |
| parent | f89b58ce71a949ca3592728b586d2077b6cc7ecc (diff) | |
arm64: tegra: Add CPU nodes to Tegra194 device tree
Add CPU and PSCI nodes to device tree. The Tegra194 SoC contains
eight NVIDIA Carmel CPUs.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia/tegra194.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 2259a2b78afc..a4dfcd19b9e8 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -368,6 +368,73 @@ }; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x10000>; + enable-method = "psci"; + }; + + cpu@1 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x10001>; + enable-method = "psci"; + }; + + cpu@2 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x101>; + enable-method = "psci"; + }; + + cpu@4 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu@5 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x201>; + enable-method = "psci"; + }; + + cpu@6 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x10300>; + enable-method = "psci"; + }; + + cpu@7 { + compatible = "nvidia,tegra194-carmel", "arm,armv8"; + device_type = "cpu"; + reg = <0x10301>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + status = "okay"; + method = "smc"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 |