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authorThierry Reding <treding@nvidia.com>2020-06-12 10:48:25 +0200
committerThierry Reding <treding@nvidia.com>2020-07-15 11:07:37 +0200
commitbb6782989df86338a64c856a2e318c3e04a699de (patch)
tree572b02ceafec7f087cf1e4b048ea48e0d2602daa /arch/arm64/boot/dts/nvidia
parentdf93557b39a99722f3a93b55617f7eaec9bab515 (diff)
arm64: tegra: Various fixes for PMICs
Standardize on "pmic" as the node name for the PMIC on Tegra210 systems and use consistent names for pinmux and GPIO hog nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi37
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-smaug.dts14
2 files changed, 25 insertions, 26 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 0f4857c07059..41beab626d95 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1328,7 +1328,7 @@
status = "okay";
clock-frequency = <400000>;
- max77620: max77620@3c {
+ pmic: pmic@3c {
compatible = "maxim,max77620";
reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -1343,12 +1343,12 @@
pinctrl-0 = <&max77620_default>;
max77620_default: pinmux@0 {
- pin_gpio0 {
+ gpio0 {
pins = "gpio0";
function = "gpio";
};
- pin_gpio1 {
+ gpio1 {
pins = "gpio1";
function = "fps-out";
drive-push-pull = <1>;
@@ -1357,34 +1357,33 @@
maxim,active-fps-power-down-slot = <0>;
};
- pin_gpio2_3 {
- pins = "gpio2", "gpio3";
+ gpio2 {
+ pins = "gpio2";
function = "fps-out";
drive-open-drain = <1>;
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
};
- pin_gpio4 {
+ gpio3 {
+ pins = "gpio3";
+ function = "fps-out";
+ drive-open-drain = <1>;
+ maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
+ };
+
+ gpio4 {
pins = "gpio4";
function = "32k-out1";
};
- pin_gpio5_6_7 {
+ gpio5_6_7 {
pins = "gpio5", "gpio6", "gpio7";
function = "gpio";
drive-push-pull = <1>;
};
-
- pin_gpio2 {
- maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
- };
-
- pin_gpio3 {
- maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
- };
};
- spmic-default-output-high {
+ gpio@0 {
gpio-hog;
output-high;
gpios = <2 GPIO_ACTIVE_HIGH>,
@@ -1652,7 +1651,7 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
- gpio = <&max77620 3 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
@@ -1666,7 +1665,7 @@
regulator-always-on;
regulator-boot-on;
- gpio = <&max77620 7 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
@@ -1711,7 +1710,7 @@
regulator-max-microvolt = <5000000>;
regulator-always-on;
- gpio = <&max77620 1 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index cdc331ac5a3e..bd78378248a6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1354,11 +1354,11 @@
maxim,enable-active-discharge;
maxim,enable-bias-control;
maxim,enable-etr;
- maxim,enable-gpio = <&max77620 5 0>;
+ maxim,enable-gpio = <&pmic 5 0>;
maxim,externally-enable;
};
- max77620: max77620@3c {
+ pmic: pmic@3c {
compatible = "maxim,max77620";
reg = <0x3c>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -1372,8 +1372,8 @@
pinctrl-names = "default";
pinctrl-0 = <&max77620_default>;
- max77620_default: pinmux@0 {
- pin_gpio {
+ max77620_default: pinmux {
+ gpio0_1_2_7 {
pins = "gpio0", "gpio1", "gpio2", "gpio7";
function = "gpio";
};
@@ -1383,7 +1383,7 @@
* sequence, So it must be sequenced up (automatically
* set by OTP) and down properly.
*/
- pin_gpio3 {
+ gpio3 {
pins = "gpio3";
function = "fps-out";
drive-open-drain = <1>;
@@ -1392,13 +1392,13 @@
maxim,active-fps-power-down-slot = <2>;
};
- pin_gpio5_6 {
+ gpio5_6 {
pins = "gpio5", "gpio6";
function = "gpio";
drive-push-pull = <1>;
};
- pin_32k {
+ gpio4 {
pins = "gpio4";
function = "32k-out1";
};